Magnetoelectronic devices, spin electronic devices, and spintronic devices are synonymous terms for devices that make use of effects predominantly caused by electron spin. Magnetoelectronics are used in numerous information devices to provide non-volatile, reliable, radiation resistant, and high-density data storage and retrieval. The numerous magnetoelectronics information devices include, but are not limited to, Magnetoresistive Random Access Memory (MRAM), magnetic sensors, and read/write heads for disk drives.
Typically an MRAM includes an array of magnetoresistive memory elements. Each magnetoresistive memory element typically has a structure that includes multiple magnetic layers separated by various non-magnetic layers, such as a magnetic tunnel junction (MTJ), and exhibits an electrical resistance that depends on the magnetic state of the device. Information is stored as directions of magnetization vectors in the magnetic layers. Magnetization vectors in one magnetic layer are magnetically fixed or pinned, while the magnetization direction of another magnetic layer may be free to switch between the same and opposite directions that are called “parallel” and “antiparallel” states, respectively. Corresponding to the parallel and antiparallel magnetic states, the magnetic memory element has low (logic “0” state) and high (logic “1” state) electrical resistance states, respectively. Accordingly, a detection of the resistance allows a magnetoresistive memory element, such as an MTJ device, to provide information stored in the magnetic memory element. There are two completely different methods used to program the free layer: field switching and spin-torque switching. In field-switched MRAM, current carrying lines adjacent to the MTJ bit are used to generate magnetic fields that act on the free layer. In spin-torque MRAM, switching is accomplished with a current pulse through the MTJ itself. The angular momentum carried by the spin-polarized tunneling current causes reversal of the free layer, with the final state (parallel or antiparallel) determined by the polarity of the current pulse. A reset current pulse will cause the final state to be parallel or logic “0”. A set current pulse, in the opposite polarity of reset current pulse, will cause the final state to be antiparallel or logic “1”. Spin-torque transfer is known to occur in MTJ devices and giant magnetoresistance devices that are patterned or otherwise arranged so that the current flows substantially perpendicular to the interfaces, and in simple wire-like structures when the current flows substantially perpendicular to a domain wall. Any such structure that exhibits magnetoresistance has the potential to be a spin-torque magnetoresistive memory element.
Spin-torque MRAM is an emerging memory technology with the potential for non-volatility with unlimited endurance and fast write speeds at much higher density than field-switched MRAM.
Data stored in memory is defined in pages within banks. A rank is a plurality of banks in a first direction (column) and a channel is a plurality of banks in a second direction (row). A process for accessing a page in the memory comprises several clock cycles required for bank, row, and column address identification as well as the transfer of data associated with a read or write operation. A high bandwidth data transfer may comprise accessing many thousands of bits of data associated with a range of address space across a page in one or more banks, ranks, or channels.
Access to a page within a bank in a memory generally includes an ACTIVATE operation, followed by several READ/WRITE operations and a PRECHARGE operation. The ACTIVATE operation opens a page associated with a specified row and bank address, thereby reading from an array of memory the state of each of the cells within the page, typically 1,000 or more bits of data. The READ/WRITE operation performs the transfer of data (reading or writing) associated with specified column addresses, e.g., 128 bits, in the open page. The PRECHARGE operation closes the page, thereby assuring that the final state of each of the cells within the page after the performed operations is stored in the array of memory and that the bank is ready to receive a subsequent ACTIVATE command.
During the ACTIVATE operation, a page of data is read from the memory array and stored in local data-store latches for subsequent READ and WRITE operations from and to the local data-store latches. The ACTIVATE operation can be initiated by an ACTIVATE command or any other command that performs the same operation. During a PRECHARGE operation, the data from local data-store latches are written back to the memory array, and as a result, that page is considered closed or not accessible without a new ACTIVATE operation. The PRECHARGE operation can be initiated by a PRECHARGE or AUTO-PRECHARGE command or any other command that performs the same operation. During the PRECHARGE operation in ST-MRAM, current pulses to write the MTJs corresponding to the open page would be applied to write-back the data from the local data-store latches to ST-MRAM array.
In an MRAM implementation using a reset operation during an ACTIVATE operation, such as designs with spin-torque reset for self-referenced read, all the bits in a page or word are reset to a predetermined state, for example, “low,” with a reset write current as part of the self-referenced read operation within the ACTIVATE operation. When the page is closed during the PRECHARGE operation, the bits with a final state indicating that they need to have their state changed are set “high” with a set write current. If error correcting code (ECC) is applied to the data that is read from the bits during the self-referenced read operation, corrected data can be used in determining the final state, and thereby which bits are selectively set during the PRECHARGE operation, reducing or eliminating the accumulation of errors over several ACTIVATE/PRECHARGE cycles. However, a bit that does not reset during the self-referenced read operation will be left in the “high” state, and, since the failing bit did not change state, the result of a self-referenced read operation will incorrectly read the failing bit as being in the “low” state. If the final data state is a “low” for that bit, the circuit will not apply a set write pulse to it during the PRECHARGE operation, leaving an error written to that word. Restated, a reset error will not always be healed by ECC. Such an error would combine with other sources, such write-back errors and hard fails, increasing the chance of having more than the correctable number of bad bits per ECC word, e.g., more than one bad bit per single-bit correction ECC word.
Accordingly, it is desirable to provide a method for healing reset errors for a self-referenced read of spin-torque bits in an MRAM. Furthermore, other desirable features and characteristics of the exemplary embodiments will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.